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AMD CPU Topology - Rome + Milan
Last time we covered Intel CPU inter-core interconnect topologies from the Cooperlake and Ice Lake server products. Next up, we’re going to cover the…
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Jason Rahman
2
Intel CPU Die Topology
Over the past 10-15 years, per-core throughput increases have slowed, and in response CPU designers have scaled up core counts and socket counts to…
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Jason Rahman
3
On Complexity
The Curse Of Complexity Software complexity takes a few different forms. A few (non-comprehensive) examples include: Tight coupling between components…
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Jason Rahman
Software Performance: System Optimizations
Introduction In previous notes, we looked at a first principles approach to system performance, centered around tail latencies. Next, we’ll look at…
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Jason Rahman
Software Performance: Generic Tricks
Avoiding Unnecessary Work We’ve covered low level cache and hardware details which affect software performance. Let’s move to a higher level of…
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Jason Rahman
3
Software Performance: Cache Locality And Allocation
Introduction In our first note we discussed the tail latency ↔ variance equivalence. We also outlined a simplistic model to decompose software into a…
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Jason Rahman
C/C++ Bootcamp
Curated C++ Learning Resources
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Jason Rahman
1
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Adventures In Low Level Programming And Software Development

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